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An IRIG Project in VHDL which needs to be completed

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Hello I have a project in VHDL which I need help on. it is an IRIG system. I have implemented everything except the decrement feature which lets the user decrements the seconds, minutes, hours, days,months, and years.Please let me know if you can help me. Once accepting the offer I will suplly the tutor with my latest work on this project.Thank you.

 
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